Project objective
The objective is to develop for commercialization an intellectual property (IP) framework aimed at the acceleration of artificial intelligence (AI), which will serve as the basis for the evolution towards a general-purpose AI chipset accelerator.
This development pursues a double purpose: 1) to consolidate an advanced technical solution and 2) to facilitate its initial adoption in the market through a two-phase introduction strategy.
The proposed IP framework will broadly include:
- Unidades aritméticas (UA) optimizadas y validadas para la ejecución eficiente de operaciones específicas de IA.
- Interfaces de integración y mecanismos de uso autónomo, compatibles con arquitecturas basadas en RISC-V, incluyendo extensiones personalizadas de instrucciones ISA.
- Herramienta software de asignación y optimización de modelos, destinada a facilitar el despliegue eficiente de redes neuronales y algoritmos de IA sobre el hardware acelerador.
As an evolution of this IP framework, the general-purpose AI accelerator will consist of at least the following hardware IP blocks, in addition to the peripherals required for integration into a System-on-Chip (SoC):
- Workload mapper module.
- Custom RISC-V instructions for AI applications.
- Internal data bus optimized for high efficiency.
- Floating point computing unit adapted to the requirements of current models.
The planned positioning for the product is focused on the segment of very low power accelerators, oriented to edge devices, with an architecture based on RISC-V whenever appropriate. The system will be optimized not only for AI inference tasks, but also for data acquisition, preprocessing and management functionalities in Internet of Things (IoT) applications.
Type of project: Aid for projects to promote the microelectronics and semiconductor value chain (ICV/ME) by 2024 (PERTEI CHIP – MIE).
Project Name: SINAPTIX
Project Description: Neural Accelerator and associated software tool for the optimal execution of AI models.File number: MIE-020100-2024-4
